Intel Announces Lunar Lake at Computex 2024 Claiming It as a No-Compromise SiP for Leadership Performance,Power Efficiency and AI
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Intel just announced their next Lunar Lake CPU at Computex 2024. Based on aggregated compute tiles aka chiplet design for processing, Input/Design, Graphics and Memory on Processor design, thus calling it as an SiP (System in Package) or SoC (System on Chip) designs similar to Apple Silicon. It's built on Intel 4 node, GPU IP (Xe2 aka BattleMage) on TSMC's 5nm and TSMC's 6nm IO die all bonded to a 20nm base tile to facilitate high density microscopic wires connecting all the tiles.
ASMedia Showcases USB4 80Gbps,120Gbps and PCIe Gen 5 PHY-L Chips at Computex 2024
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ASMedia just announced their USB4 80Gbps, 120Gbps and PCIe Gen 5 PHY-L (Physical Layer) chips at Computex 2024. PCIe Gen 5 caters to High Performance Computing (HPC), AI and big data processing further enhancing transmission speed, low latency and support more incoming high performance devices.