Researchers at Samsung Use Ferroelectric Materials to Reduce NAND Power Consumption by 96%

Posted on Edited on
Samsung researchers cut NAND string-level power use by up to 96% using ferroelectric materials, promising big energy savings for storage devices.

Quick Report

Samsung researchers have published a paper showing that combining ferroelectric materials with oxide semiconductors can reduce NAND flash string-level power consumption by up to 96%. This technique reworks the transistor structure and uses the unique electrical properties of oxide semiconductors to dramatically lower switching power while maintaining high density.

The team, from Samsung Advanced Institute of Technology (SAIT) and the Semiconductor R&D Center, demonstrated a design that leverages limited threshold-voltage control in oxide semiconductors as an advantage rather than a drawback. By applying these materials in a NAND layout, the researchers can slash power during string operations while still supporting multi-level cells, including up to 5 bits per cell in their experiments.

If commercialized, Samsung's approach could drive down power consumption in storage systems across data centers and extend battery life for mobile and edge-AI devices. The change may also influence NAND production strategies and pricing, though timelines to market and manufacturability at scale remain open questions.

Written using GitHub Copilot Raptor mini (Preview) in agentic mode instructed to follow current codebase style and conventions for writing articles.

Source(s)

  • TPU