Intel Announces Lunar Lake at Computex 2024 Claiming It as a No-Compromise SiP for Leadership Performance,Power Efficiency and AI

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Intel just announced their next Lunar Lake CPU at Computex 2024. Based on aggregated compute tiles aka chiplet design for processing, Input/Design, Graphics and Memory on Processor design, thus calling it as an SiP (System in Package) or SoC (System on Chip) designs similar to Apple Silicon. It's built on Intel 4 node, GPU IP (Xe2 aka BattleMage) on TSMC's 5nm and TSMC's 6nm IO die all bonded to a 20nm base tile to facilitate high density microscopic wires connecting all the tiles.

Essentially, uses Foveros packaging technique developed by Intel to stack all their tiles to aggregate and work as single chip with Lion Cove P-Core and Skymont E-Cores forgoing Hyper Thread Technology to provide better performance and efficiency than MTL (MeTeor Lake) to push NPU performance up to 40 TOPs for Copilot+ experiences.

It is also bringing better RT, AI and battery life improvements with BattleMage GPU. Base On-Die memory starts from 16GB and maxed out at 32GB LPDDR5X-7000/8000+ MTps.

There's improvements to Thread Director, Xe media Engine supporting hardware accelerated AV1 encode/decode and VVC/H266 decoding along with DP 2.1 and HDMI 2.1 ports.

A deep dive article from TechPowerUp and PCWorld's article and video discussing Lunar Lake improvements with Intel’s (VP and GM for Client AI & Technical Marketing) Robert Hallock and Dan Rogers (VP and GM).

Intel will now compete with Apple, AMD and Qualcomm for leadership performance and efficiency so what's in for users in general, more competition and better pricing.

Source(s)

  • Computex 2024 at Taipei
  • TechPowerUp
  • PC World article